2

I need to read a total of 64 analog voltages for a project I'm working on. This is a learning project and I'm starting from scratch, so I'm a bit lost.

I've considered a 64-channel analog to digital converter. However, those seem to be out of my price range (>$100), and I'm not sure how to scale up from more basic converters that it's easier to find tutorials for. I could use several of those more basic converters in combination with port expanders, but I suspect there's a better solution than "just add more X" that I don't know of yet.

I've looked into using a microcontroller to process the data and then send the Pi the results, but after reading several "how to choose a microcontroller" articles I think that might be overkill - though it seems like it would be cheaper and less electrically complex than the system I described above, so maybe not.

Could someone with more experience please point me in the right direction?

Edit to add requested information: Sampling rate need be no more than 10 Hz, with a resolution of 100 mV within a range of 0-5V. Readings do not need to be synchronous.

Jessica Alan
  • 123
  • 4
  • First thing you have to check is how often you have to sample the voltages. That decides how many ADCs you need and how many multiplexed inputs you could use per ADC. Do you need a synchronous sample of all voltages or is a delay allowed? – Janka Dec 22 '16 at 21:43
  • Frequency isn't an issue; 10 Hz would be more than enough. Non-synchronous is fine. – Jessica Alan Dec 22 '16 at 22:02
  • 100 mV without the relevant full voltage swing to cover is not yet sufficient. Could you please specify this too? – Ghanima Dec 22 '16 at 22:11

2 Answers2

3

Even though this question is better asked on Electronics.StackExchange.com, here are some thoughts:

You could get nine 8:1 Multiplexers/Demultiplexers like this one: http://www.digikey.com/product-detail/en/texas-instruments/CD4051BE/296-2057-5-ND/67305, which costs $0.52 per item (so less than $5 total).

Use three lines to activate the master multiplexer (choosing which one of the 8 other multiplexers is active), then use three other lines which are shared across all the other 8 multiplexers to determine which input line from the multiplexer you listen too).

Connect a single ADC to the output of the first multiplexer and read your signals one at a time, switching inputs using your 6 data selector lines. Of course you need to make sure that your signal voltages fit the multiplexer specs (and same for Wattage), and know what latency your ADC has between measurements, but this might be a cheaper solution than getting a single dedicated 64-port ADC like the Texas Instruments DDC264 (which costs ~$120 on DigiKey).

Phil B.
  • 5,043
  • 15
  • 30
3

There is a little more to know than "need to read a total of 64 analog voltages" to make an educated guess here. Those are especially the resolution and the sampling rate. Related with the sampling rate is the bandwidth of data necessary to transfer to the Pi.

Sampling rate need be no more than 10 Hz, with a resolution of 100 mV. Readings do not need to be synchronous.

For reading 64 channels with this "relatively" low sampling rate I would investigate I2C based 8-channel ADCs and chain eight of them to the I2C bus. This way you completely avoid additional demuxing of digital lines or multiplexing analog signals to the input of a smaller number of ADCs (in other words it simplifies the hardware design).

With 8-bit (100 mV resolution at 5V) the transmission of at least four bytes per channel to read is necessary (address byte, command byte (channel select), address byte, read data byte). So it's roughly 8 bit * 4 byte/channel * 64 channels * 10 readings/sec = 20 kbit/s (give or take an Acknowledge Bit here and there). That's well achievable even with the slowest I2C mode (100 kHz, standard mode). Note that the sampling dynamics (conversion rate and throughput frequency) may depend on clock rate of the I2C bus (SCL) - e.g. with the OnSemi NCD9830-D (which is not suitable for this project as it only offers two selectable address lines - so no more than four of those chips on one bus).

Another approach using the SPI interface (e.g. with the MCP3008 mentioned in the question) is also possible. It is then necessary to use additional GPIO pins as CS select pins - as the dedicated hardware pins to do so are limited. This question and its answers explain it: Add more than 2 SPI slaves Again this reduces additional hardware components.

Community
  • 1
Ghanima
  • 15,855
  • 15
  • 61
  • 119
  • Thanks for the detailed reply. Since you mention avoiding multiplexing as desirable, am I correct in thinking that your I2C chain idea would be less challenging for a newbie than Phil's suggestion? – Jessica Alan Dec 22 '16 at 23:05
  • I2C chaining depends on how many addresses you can select for the ADCs, right? – user253751 Dec 23 '16 at 01:39
  • Also some SPI devices (but I don't know which ADCs) are daisy-chainable, using 4 wires total for an arbitrary number of devices (up to fan-out limitations). – user253751 Dec 23 '16 at 01:40